Re-implemented PCI driver.

Adding the affected files to the makefile doesn't work, though. This
probably has something to do with the 12KiB file size limit which should
have been fixed by now! I'll need to investigate this tomorrow.

2 files changed, 243 insertions, 0 deletions

diff --git a/kernel/drivers/pci.c b/kernel/drivers/pci.c
new file mode 100644
index 0000000..9c16601
--- /dev/null
+++ b/kernel/drivers/pci.c
@@ -0,0 +1,142 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#include <cpu.h>
+#include <def.h>
+#include <mem.h>
+#include <pci.h>
+
+void pci_write_field(u32 device, int field, u32 value)
+{
+	outl(PCI_ADDRESS_PORT, pci_get_addr(device, field));
+	outl(PCI_VALUE_PORT, value);
+}
+
+u32 pci_read_field(u32 device, int field, int size)
+{
+	outl(PCI_ADDRESS_PORT, pci_get_addr(device, field));
+
+	if (size == 4) {
+		u32 t = inl(PCI_VALUE_PORT);
+		return t;
+	} else if (size == 2) {
+		u16 t = inw((u16)(PCI_VALUE_PORT + (field & 2)));
+		return t;
+	} else if (size == 1) {
+		u8 t = inb((u16)(PCI_VALUE_PORT + (field & 3)));
+		return t;
+	}
+	return 0xFFFF;
+}
+
+u16 pci_find_type(u32 device)
+{
+	return (u16)((pci_read_field(device, PCI_CLASS, 1) << 8) |
+		     pci_read_field(device, PCI_SUBCLASS, 1));
+}
+
+void pci_scan_hit(pci_func_t f, u32 dev, void *extra)
+{
+	int dev_vend = (int)pci_read_field(dev, PCI_VENDOR_ID, 2);
+	int dev_dvid = (int)pci_read_field(dev, PCI_DEVICE_ID, 2);
+
+	f(dev, (u16)dev_vend, (u16)dev_dvid, extra);
+}
+
+void pci_scan_func(pci_func_t f, int type, int bus, int slot, int func, void *extra)
+{
+	u32 dev = pci_box_device(bus, slot, func);
+	if (type == -1 || type == pci_find_type(dev))
+		pci_scan_hit(f, dev, extra);
+	if (pci_find_type(dev) == PCI_TYPE_BRIDGE)
+		pci_scan_bus(f, type, (int)pci_read_field(dev, PCI_SECONDARY_BUS, 1), extra);
+}
+
+void pci_scan_slot(pci_func_t f, int type, int bus, int slot, void *extra)
+{
+	u32 dev = pci_box_device(bus, slot, 0);
+	if (pci_read_field(dev, PCI_VENDOR_ID, 2) == PCI_NONE)
+		return;
+	pci_scan_func(f, type, bus, slot, 0, extra);
+	if (!pci_read_field(dev, PCI_HEADER_TYPE, 1))
+		return;
+	for (int func = 1; func < 8; func++) {
+		dev = pci_box_device(bus, slot, func);
+		if (pci_read_field(dev, PCI_VENDOR_ID, 2) != PCI_NONE)
+			pci_scan_func(f, type, bus, slot, func, extra);
+	}
+}
+
+void pci_scan_bus(pci_func_t f, int type, int bus, void *extra)
+{
+	for (int slot = 0; slot < 32; ++slot)
+		pci_scan_slot(f, type, bus, slot, extra);
+}
+
+void pci_scan(pci_func_t f, int type, void *extra)
+{
+	if ((pci_read_field(0, PCI_HEADER_TYPE, 1) & 0x80) == 0) {
+		pci_scan_bus(f, type, 0, extra);
+		return;
+	}
+
+	for (int func = 0; func < 8; ++func) {
+		u32 dev = pci_box_device(0, 0, func);
+		if (pci_read_field(dev, PCI_VENDOR_ID, 2) != PCI_NONE)
+			pci_scan_bus(f, type, func, extra);
+		else
+			break;
+	}
+}
+
+static void find_isa_bridge(u32 device, u16 vendor_id, u16 device_id, void *extra)
+{
+	if (vendor_id == 0x8086 && (device_id == 0x7000 || device_id == 0x7110))
+		*((u32 *)extra) = device;
+}
+
+static u32 pci_isa = 0;
+static u8 pci_remaps[4] = { 0 };
+
+// Remap
+void pci_install()
+{
+	pci_scan(&find_isa_bridge, -1, &pci_isa);
+	if (pci_isa) {
+		for (int i = 0; i < 4; ++i) {
+			pci_remaps[i] = (u8)pci_read_field(pci_isa, 0x60 + i, 1);
+			if (pci_remaps[i] == 0x80) {
+				pci_remaps[i] = (u8)(10 + (i % 1));
+			}
+		}
+		u32 out = 0;
+		memcpy(&out, &pci_remaps, 4);
+		pci_write_field(pci_isa, 0x60, out);
+	}
+}
+
+int pci_get_interrupt(u32 device)
+{
+	if (pci_isa) {
+		u32 irq_pin = pci_read_field(device, 0x3D, 1);
+		if (irq_pin == 0)
+			return (int)pci_read_field(device, PCI_INTERRUPT_LINE, 1);
+		int pirq = (int)(irq_pin + pci_extract_slot(device) - 2) % 4;
+		int int_line = (int)pci_read_field(device, PCI_INTERRUPT_LINE, 1);
+
+		if (pci_remaps[pirq] >= 0x80) {
+			if (int_line == 0xFF) {
+				int_line = 10;
+				pci_write_field(device, PCI_INTERRUPT_LINE, (u32)int_line);
+			}
+			pci_remaps[pirq] = (u8)int_line;
+			u32 out = 0;
+			memcpy(&out, &pci_remaps, 4);
+			pci_write_field(pci_isa, 0x60, out);
+			return int_line;
+		}
+		pci_write_field(device, PCI_INTERRUPT_LINE, pci_remaps[pirq]);
+		return pci_remaps[pirq];
+	} else {
+		return (int)pci_read_field(device, PCI_INTERRUPT_LINE, 1);
+	}
+}
diff --git a/kernel/inc/pci.h b/kernel/inc/pci.h
new file mode 100644
index 0000000..10aea56
--- /dev/null
+++ b/kernel/inc/pci.h
@@ -0,0 +1,101 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef PCI_H
+#define PCI_H
+
+#include <def.h>
+
+#define PCI_VENDOR_ID 0x00 // 2
+#define PCI_DEVICE_ID 0x02 // 2
+#define PCI_COMMAND 0x04 // 2
+#define PCI_STATUS 0x06 // 2
+#define PCI_REVISION_ID 0x08 // 1
+
+#define PCI_PROG_IF 0x09 // 1
+#define PCI_SUBCLASS 0x0a // 1
+#define PCI_CLASS 0x0b // 1
+#define PCI_CACHE_LINE_SIZE 0x0c // 1
+#define PCI_LATENCY_TIMER 0x0d // 1
+#define PCI_HEADER_TYPE 0x0e // 1
+#define PCI_BIST 0x0f // 1
+#define PCI_BAR0 0x10 // 4
+#define PCI_BAR1 0x14 // 4
+#define PCI_BAR2 0x18 // 4
+#define PCI_BAR3 0x1C // 4
+#define PCI_BAR4 0x20 // 4
+#define PCI_BAR5 0x24 // 4
+
+#define PCI_INTERRUPT_LINE 0x3C // 1
+
+#define PCI_SECONDARY_BUS 0x19 // 1
+
+#define PCI_HEADER_TYPE_DEVICE 0
+#define PCI_HEADER_TYPE_BRIDGE 1
+#define PCI_HEADER_TYPE_CARDBUS 2
+
+#define PCI_TYPE_BRIDGE 0x0604
+#define PCI_TYPE_SATA 0x0106
+
+#define PCI_ADDRESS_PORT 0xCF8
+#define PCI_VALUE_PORT 0xCFC
+
+#define PCI_NONE 0xFFFF
+
+typedef void (*pci_func_t)(u32 device, u16 vendor_id, u16 device_id, void *extra);
+
+struct pci_device_descriptor {
+	u32 port_base;
+	u32 interrupt;
+
+	u8 bus;
+	u8 slot;
+	u8 func;
+
+	u16 vendor_id;
+	u16 device_id;
+
+	u8 class_id;
+	u8 subclass_id;
+	u8 interface_id;
+
+	u8 revision;
+};
+
+static inline int pci_extract_bus(u32 device)
+{
+	return (u8)((device >> 16));
+}
+
+static inline int pci_extract_slot(u32 device)
+{
+	return (u8)((device >> 8));
+}
+
+static inline int pci_extract_func(u32 device)
+{
+	return (u8)(device);
+}
+
+static inline u32 pci_get_addr(u32 device, int field)
+{
+	return 0x80000000 | (pci_extract_bus(device) << 16) | (pci_extract_slot(device) << 11) |
+	       (pci_extract_func(device) << 8) | ((field)&0xFC);
+}
+
+static inline u32 pci_box_device(int bus, int slot, int func)
+{
+	return (u32)((bus << 16) | (slot << 8) | func);
+}
+
+u32 pci_read_field(u32 device, int field, int size);
+void pci_write_field(u32 device, int field, u32 value);
+u16 pci_find_type(u32 dev);
+void pci_scan_hit(pci_func_t f, u32 dev, void *extra);
+void pci_scan_func(pci_func_t f, int type, int bus, int slot, int func, void *extra);
+void pci_scan_slot(pci_func_t f, int type, int bus, int slot, void *extra);
+void pci_scan_bus(pci_func_t f, int type, int bus, void *extra);
+void pci_scan(pci_func_t f, int type, void *extra);
+int pci_get_interrupt(u32 device);
+void pci_install();
+
+#endif