New elegant I/O blocking solution

This is done using an internal scheduler syscall (127).

Very nice!

2 files changed, 66 insertions, 62 deletions

diff --git a/kernel/drivers/interrupts.asm b/kernel/drivers/interrupts.asm
index 9f475fb..18cf007 100644
--- a/kernel/drivers/interrupts.asm
+++ b/kernel/drivers/interrupts.asm
@@ -106,6 +106,7 @@ ISR_NOERRCODE 28
 ISR_NOERRCODE 29
 ISR_NOERRCODE 30
 ISR_NOERRCODE 31
+ISR_NOERRCODE 127
 ISR_NOERRCODE 128
 
 extern isr_handler
diff --git a/kernel/drivers/interrupts.c b/kernel/drivers/interrupts.c
index 8ca6987..5b94b94 100644
--- a/kernel/drivers/interrupts.c
+++ b/kernel/drivers/interrupts.c
@@ -1,6 +1,7 @@
 // MIT License, Copyright (c) 2020 Marvin Borner
 // TODO: Remove some magic numbers
 
+#include <assert.h>
 #include <cpu.h>
 #include <def.h>
 #include <interrupts.h>
@@ -21,13 +22,13 @@ PROTECTED static struct idt_ptr idt_ptr = { 0 };
 CLEAR void idt_set_gate(u8 num, u32 base, u16 sel, u8 flags)
 {
 	// Specify the interrupt routine's base address
-	idt[num].base_low = (u16)(base & 0xFFFF);
-	idt[num].base_high = (u16)((base >> 16) & 0xFFFF);
+	idt[num].base_low = (u16)(base & 0xffff);
+	idt[num].base_high = (u16)((base >> 16) & 0xffff);
 
 	// Set selector/segment of IDT entry
 	idt[num].sel = sel;
 	idt[num].always0 = 0;
-	idt[num].flags = (u8)(flags | 0x60);
+	idt[num].flags = flags;
 }
 
 // Install IDT
@@ -65,15 +66,15 @@ CLEAR void irq_uninstall_handler(int irq)
 CLEAR static void irq_remap(void)
 {
 	outb(0x20, 0x11);
-	outb(0xA0, 0x11);
+	outb(0xa0, 0x11);
 	outb(0x21, 0x20);
-	outb(0xA1, 0x28);
+	outb(0xa1, 0x28);
 	outb(0x21, 0x04);
-	outb(0xA1, 0x02);
+	outb(0xa1, 0x02);
 	outb(0x21, 0x01);
-	outb(0xA1, 0x01);
+	outb(0xa1, 0x01);
 	outb(0x21, 0x00);
-	outb(0xA1, 0x00);
+	outb(0xa1, 0x00);
 }
 
 // Handle IRQ ISRs
@@ -89,7 +90,7 @@ void irq_handler(struct regs *r)
 
 	// Send EOI to second (slave) PIC
 	if (r->int_no >= 40)
-		outb(0xA0, 0x20);
+		outb(0xa0, 0x20);
 
 	// Send EOI to master PIC
 	outb(0x20, 0x20);
@@ -100,23 +101,23 @@ CLEAR static void irq_install(void)
 {
 	irq_remap();
 
-	idt_set_gate(32, (u32)irq0, 0x08, 0x8E);
-	idt_set_gate(33, (u32)irq1, 0x08, 0x8E);
-	idt_set_gate(34, (u32)irq2, 0x08, 0x8E);
-	idt_set_gate(35, (u32)irq3, 0x08, 0x8E);
-	idt_set_gate(36, (u32)irq4, 0x08, 0x8E);
-	idt_set_gate(37, (u32)irq5, 0x08, 0x8E);
-	idt_set_gate(38, (u32)irq6, 0x08, 0x8E);
-	idt_set_gate(39, (u32)irq7, 0x08, 0x8E);
-
-	idt_set_gate(40, (u32)irq8, 0x08, 0x8E);
-	idt_set_gate(41, (u32)irq9, 0x08, 0x8E);
-	idt_set_gate(42, (u32)irq10, 0x08, 0x8E);
-	idt_set_gate(43, (u32)irq11, 0x08, 0x8E);
-	idt_set_gate(44, (u32)irq12, 0x08, 0x8E);
-	idt_set_gate(45, (u32)irq13, 0x08, 0x8E);
-	idt_set_gate(46, (u32)irq14, 0x08, 0x8E);
-	idt_set_gate(47, (u32)irq15, 0x08, 0x8E);
+	idt_set_gate(32, (u32)irq0, 0x08, 0x8e);
+	idt_set_gate(33, (u32)irq1, 0x08, 0x8e);
+	idt_set_gate(34, (u32)irq2, 0x08, 0x8e);
+	idt_set_gate(35, (u32)irq3, 0x08, 0x8e);
+	idt_set_gate(36, (u32)irq4, 0x08, 0x8e);
+	idt_set_gate(37, (u32)irq5, 0x08, 0x8e);
+	idt_set_gate(38, (u32)irq6, 0x08, 0x8e);
+	idt_set_gate(39, (u32)irq7, 0x08, 0x8e);
+
+	idt_set_gate(40, (u32)irq8, 0x08, 0x8e);
+	idt_set_gate(41, (u32)irq9, 0x08, 0x8e);
+	idt_set_gate(42, (u32)irq10, 0x08, 0x8e);
+	idt_set_gate(43, (u32)irq11, 0x08, 0x8e);
+	idt_set_gate(44, (u32)irq12, 0x08, 0x8e);
+	idt_set_gate(45, (u32)irq13, 0x08, 0x8e);
+	idt_set_gate(46, (u32)irq14, 0x08, 0x8e);
+	idt_set_gate(47, (u32)irq15, 0x08, 0x8e);
 }
 
 /**
@@ -187,12 +188,14 @@ void isr_panic(struct regs *r)
 	} else {
 		__asm__ volatile("cli\nhlt");
 	}
-	proc_yield(r);
+	proc_yield();
 }
 
 void isr_handler(struct regs *r);
 void isr_handler(struct regs *r)
 {
+	assert(r->int_no < sizeof(isr_routines));
+
 	// Execute fault handler if exists
 	void (*handler)(struct regs * r) = isr_routines[r->int_no];
 	if (handler)
@@ -203,41 +206,41 @@ void isr_handler(struct regs *r)
 
 CLEAR static void isr_install(void)
 {
-	idt_set_gate(0, (u32)isr0, 0x08, 0x8E);
-	idt_set_gate(1, (u32)isr1, 0x08, 0x8E);
-	idt_set_gate(2, (u32)isr2, 0x08, 0x8E);
-	idt_set_gate(3, (u32)isr3, 0x08, 0x8E);
-	idt_set_gate(4, (u32)isr4, 0x08, 0x8E);
-	idt_set_gate(5, (u32)isr5, 0x08, 0x8E);
-	idt_set_gate(6, (u32)isr6, 0x08, 0x8E);
-	idt_set_gate(7, (u32)isr7, 0x08, 0x8E);
-
-	idt_set_gate(8, (u32)isr8, 0x08, 0x8E);
-	idt_set_gate(9, (u32)isr9, 0x08, 0x8E);
-	idt_set_gate(10, (u32)isr10, 0x08, 0x8E);
-	idt_set_gate(11, (u32)isr11, 0x08, 0x8E);
-	idt_set_gate(12, (u32)isr12, 0x08, 0x8E);
-	idt_set_gate(13, (u32)isr13, 0x08, 0x8E);
-	idt_set_gate(14, (u32)isr14, 0x08, 0x8E);
-	idt_set_gate(15, (u32)isr15, 0x08, 0x8E);
-
-	idt_set_gate(16, (u32)isr16, 0x08, 0x8E);
-	idt_set_gate(17, (u32)isr17, 0x08, 0x8E);
-	idt_set_gate(18, (u32)isr18, 0x08, 0x8E);
-	idt_set_gate(19, (u32)isr19, 0x08, 0x8E);
-	idt_set_gate(20, (u32)isr20, 0x08, 0x8E);
-	idt_set_gate(21, (u32)isr21, 0x08, 0x8E);
-	idt_set_gate(22, (u32)isr22, 0x08, 0x8E);
-	idt_set_gate(23, (u32)isr23, 0x08, 0x8E);
-
-	idt_set_gate(24, (u32)isr24, 0x08, 0x8E);
-	idt_set_gate(25, (u32)isr25, 0x08, 0x8E);
-	idt_set_gate(26, (u32)isr26, 0x08, 0x8E);
-	idt_set_gate(27, (u32)isr27, 0x08, 0x8E);
-	idt_set_gate(28, (u32)isr28, 0x08, 0x8E);
-	idt_set_gate(29, (u32)isr29, 0x08, 0x8E);
-	idt_set_gate(30, (u32)isr30, 0x08, 0x8E);
-	idt_set_gate(31, (u32)isr31, 0x08, 0x8E);
+	idt_set_gate(0, (u32)isr0, 0x08, 0x8e);
+	idt_set_gate(1, (u32)isr1, 0x08, 0x8e);
+	idt_set_gate(2, (u32)isr2, 0x08, 0x8e);
+	idt_set_gate(3, (u32)isr3, 0x08, 0x8e);
+	idt_set_gate(4, (u32)isr4, 0x08, 0x8e);
+	idt_set_gate(5, (u32)isr5, 0x08, 0x8e);
+	idt_set_gate(6, (u32)isr6, 0x08, 0x8e);
+	idt_set_gate(7, (u32)isr7, 0x08, 0x8e);
+
+	idt_set_gate(8, (u32)isr8, 0x08, 0x8e);
+	idt_set_gate(9, (u32)isr9, 0x08, 0x8e);
+	idt_set_gate(10, (u32)isr10, 0x08, 0x8e);
+	idt_set_gate(11, (u32)isr11, 0x08, 0x8e);
+	idt_set_gate(12, (u32)isr12, 0x08, 0x8e);
+	idt_set_gate(13, (u32)isr13, 0x08, 0x8e);
+	idt_set_gate(14, (u32)isr14, 0x08, 0x8e);
+	idt_set_gate(15, (u32)isr15, 0x08, 0x8e);
+
+	idt_set_gate(16, (u32)isr16, 0x08, 0x8e);
+	idt_set_gate(17, (u32)isr17, 0x08, 0x8e);
+	idt_set_gate(18, (u32)isr18, 0x08, 0x8e);
+	idt_set_gate(19, (u32)isr19, 0x08, 0x8e);
+	idt_set_gate(20, (u32)isr20, 0x08, 0x8e);
+	idt_set_gate(21, (u32)isr21, 0x08, 0x8e);
+	idt_set_gate(22, (u32)isr22, 0x08, 0x8e);
+	idt_set_gate(23, (u32)isr23, 0x08, 0x8e);
+
+	idt_set_gate(24, (u32)isr24, 0x08, 0x8e);
+	idt_set_gate(25, (u32)isr25, 0x08, 0x8e);
+	idt_set_gate(26, (u32)isr26, 0x08, 0x8e);
+	idt_set_gate(27, (u32)isr27, 0x08, 0x8e);
+	idt_set_gate(28, (u32)isr28, 0x08, 0x8e);
+	idt_set_gate(29, (u32)isr29, 0x08, 0x8e);
+	idt_set_gate(30, (u32)isr30, 0x08, 0x8e);
+	idt_set_gate(31, (u32)isr31, 0x08, 0x8e);
 
 	// Set default routines
 	for (u32 i = 0; i < 256; i++)