Major restructuring

14 files changed, 905 insertions, 0 deletions

diff --git a/kernel/inc/drivers/acpi.h b/kernel/inc/drivers/acpi.h
new file mode 100644
index 0000000..29dcd32
--- /dev/null
+++ b/kernel/inc/drivers/acpi.h
@@ -0,0 +1,190 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef ACPI_H
+#define ACPI_H
+
+#include <def.h>
+
+#define RSDP_MAGIC "RSD PTR "
+#define RSDT_MAGIC "RSDT"
+#define MADT_MAGIC "APIC"
+#define FADT_MAGIC "FACP"
+#define HPET_MAGIC "HPET"
+
+#define HPET_MAX_PERIOD 0x05F5E100
+
+struct address_structure {
+	u8 address_space_id;
+	u8 register_bit_width;
+	u8 register_bit_offset;
+	u8 reserved;
+	u32 phys; // Actually u64
+};
+
+/**
+ * General headers
+ */
+
+struct sdt_header {
+	char signature[4];
+	u32 length;
+	u8 revision;
+	u8 checksum;
+	char oem_id[6];
+	char oem_table_id[8];
+	u32 oem_revision;
+	u32 creator_id;
+	u32 creator_revision;
+};
+
+struct sdp_header {
+	char signature[8];
+	u8 checksum;
+	char oem_id[6];
+	u8 revision;
+};
+
+/**
+ * RSDT
+ */
+
+struct rsdt {
+	struct sdt_header header;
+	u32 sdt_pointer[];
+};
+
+/**
+ * MADT
+ */
+
+struct madt_entry_header {
+	u8 type;
+	u8 length;
+};
+
+struct madt {
+	struct sdt_header header;
+	u32 local_address;
+	u32 flags;
+	struct madt_entry_header entry;
+} PACKED;
+
+#define MADT_LOCAL_APIC_ENTRY 0
+#define MADT_IO_APIC_ENTRY 1
+#define MADT_INT_SRC_OVERRIDE_ENTRY 2
+#define MADT_NON_MASKABLE_INT_ENTRY 4 // Where's 3?
+#define MADT_LOCAL_APIC_OVERRIDE_ENTRY 5
+
+struct madt_local_apic_entry {
+	struct madt_entry_header header;
+	u8 processor_id;
+	u8 id;
+	u32 flags;
+} PACKED;
+
+struct madt_io_apic_entry {
+	struct madt_entry_header header;
+	u8 id;
+	u8 reserved;
+	u32 address;
+	u32 global_system_interrupt_base;
+} PACKED;
+
+struct madt_int_src_override_entry {
+	struct madt_entry_header header;
+	u8 bus_source;
+	u8 irq_source;
+	u32 global_system_interrupt;
+	u16 flags;
+} PACKED;
+
+struct madt_non_maskable_int_entry {
+	struct madt_entry_header header;
+	u8 processor_id;
+	u16 flags;
+	u8 lint_number;
+} PACKED;
+
+struct madt_local_apic_override_entry {
+	struct madt_entry_header header;
+	u16 reserved;
+	u64 address;
+} PACKED;
+
+/**
+ * FADT
+ */
+
+struct fadt {
+	struct sdt_header header;
+	// TODO: FADT table (big!)
+} PACKED;
+
+/**
+ * HPET
+ */
+
+struct hpet {
+	struct sdt_header header;
+	u8 hardware_rev_id;
+	u8 comparator_count : 5;
+	u8 counter_size : 1;
+	u8 reserved : 1;
+	u8 legacy_replacement : 1;
+	u16 pci_vendor_id;
+	struct address_structure address;
+	u8 hpet_number;
+	u16 minimum_tick;
+	u8 page_protection;
+} PACKED;
+
+enum hpet_features { hpet_counter_size = 1 << 3, hpet_legacy_replacement_support = 1 << 5 };
+enum hpet_config { hpet_enable = 1 << 0, hpet_legacy_replacement = 1 << 1 };
+enum hpet_timer {
+	hpet_type = 1 << 1,
+	hpet_enable_timer = 1 << 2,
+	hpet_periodic = 1 << 3,
+	hpet_periodic_support = 1 << 4,
+	hpet_size = 1 << 5, // 1 if 64 bit
+	hpet_set_accumulator = 1 << 6,
+	hpet_force_32 = 1 << 8, // For 64 bit
+	hpet_apic_routing = 1 << 13,
+	hpet_fsb = 1 << 14,
+	hpet_fsb_support = 1 << 15,
+	/* routing_capability = 1 << 63 */
+};
+
+struct hpet_registers {
+	u32 features; // enum hpet_features
+	u32 tick_period;
+	u64 reserved1;
+	u64 config; // enum hpet_config
+	u64 reserved2;
+	u32 int_status; // For timer #n
+	u32 reserved3;
+	u8 reserved4[200]; // Why?!
+	u32 counter;
+	u32 counter_high; // 0 due to 64 bit
+	u64 reserved5;
+	u64 timer0; // enum hpet_timer
+	u64 timer_comparator0; // In femtoseconds
+} PACKED;
+
+/**
+ * RSDP
+ */
+
+struct rsdp {
+	struct sdp_header header;
+	struct rsdt *rsdt;
+};
+
+struct madt *madt;
+struct fadt *fadt;
+struct hpet *hpet;
+
+void acpi_install(void);
+void hpet_install(u32 period);
+void madt_install(void);
+
+#endif
diff --git a/kernel/inc/drivers/cpu.h b/kernel/inc/drivers/cpu.h
new file mode 100644
index 0000000..7ac6074
--- /dev/null
+++ b/kernel/inc/drivers/cpu.h
@@ -0,0 +1,178 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef CPU_H
+#define CPU_H
+
+#include <def.h>
+
+static inline void spinlock(u32 *ptr)
+{
+	u32 prev;
+	do
+		__asm__ volatile("lock xchgl %0,%1" : "=a"(prev) : "m"(*ptr), "a"(1));
+	while (prev);
+}
+
+u8 inb(u16 port);
+u16 inw(u16 port);
+u32 inl(u16 port);
+
+void outb(u16 port, u8 data);
+void outw(u16 port, u16 data);
+void outl(u16 port, u32 data);
+
+void cpu_print(void);
+void cpu_enable_features(void);
+void fpu_restore(void);
+
+u32 cr0_get(void);
+void cr0_set(u32 cr0);
+u32 cr3_get(void);
+void cr3_set(u32 cr3);
+u32 cr4_get(void);
+void cr4_set(u32 cr4);
+
+void clac(void);
+void stac(void);
+
+void cli(void);
+void sti(void);
+
+struct cpuid {
+	u32 eax;
+	u32 ebx;
+	u32 ecx;
+	u32 edx;
+};
+
+enum cpuid_requests {
+	CPUID_VENDOR_STRING,
+	CPUID_FEATURES,
+	CPUID_TLB,
+	CPUID_SERIAL,
+	CPUID_EXT_FEATURES = 7,
+};
+
+enum cpuid_features {
+	CPUID_FEAT_ECX_SSE3 = 1u << 0,
+	CPUID_FEAT_ECX_PCLMUL = 1u << 1,
+	CPUID_FEAT_ECX_DTES64 = 1u << 2,
+	CPUID_FEAT_ECX_MONITOR = 1u << 3,
+	CPUID_FEAT_ECX_DS_CPL = 1u << 4,
+	CPUID_FEAT_ECX_VMX = 1u << 5,
+	CPUID_FEAT_ECX_SMX = 1u << 6,
+	CPUID_FEAT_ECX_EST = 1u << 7,
+	CPUID_FEAT_ECX_TM2 = 1u << 8,
+	CPUID_FEAT_ECX_SSSE3 = 1u << 9,
+	CPUID_FEAT_ECX_CID = 1u << 10,
+	CPUID_FEAT_ECX_FMA = 1u << 12,
+	CPUID_FEAT_ECX_CX16 = 1u << 13,
+	CPUID_FEAT_ECX_ETPRD = 1u << 14,
+	CPUID_FEAT_ECX_PDCM = 1u << 15,
+	CPUID_FEAT_ECX_PCIDE = 1u << 17,
+	CPUID_FEAT_ECX_DCA = 1u << 18,
+	CPUID_FEAT_ECX_SSE4_1 = 1u << 19,
+	CPUID_FEAT_ECX_SSE4_2 = 1u << 20,
+	CPUID_FEAT_ECX_x2APIC = 1u << 21,
+	CPUID_FEAT_ECX_MOVBE = 1u << 22,
+	CPUID_FEAT_ECX_POPCNT = 1u << 23,
+	CPUID_FEAT_ECX_AES = 1u << 25,
+	CPUID_FEAT_ECX_XSAVE = 1u << 26,
+	CPUID_FEAT_ECX_OSXSAVE = 1u << 27,
+	CPUID_FEAT_ECX_AVX = 1u << 28,
+	CPUID_FEAT_ECX_F16C = 1u << 29,
+	CPUID_FEAT_ECX_RDRND = 1u << 30,
+
+	CPUID_FEAT_EDX_FPU = 1u << 0,
+	CPUID_FEAT_EDX_VME = 1u << 1,
+	CPUID_FEAT_EDX_DE = 1u << 2,
+	CPUID_FEAT_EDX_PSE = 1u << 3,
+	CPUID_FEAT_EDX_TSC = 1u << 4,
+	CPUID_FEAT_EDX_MSR = 1u << 5,
+	CPUID_FEAT_EDX_PAE = 1u << 6,
+	CPUID_FEAT_EDX_MCE = 1u << 7,
+	CPUID_FEAT_EDX_CX8 = 1u << 8,
+	CPUID_FEAT_EDX_APIC = 1u << 9,
+	CPUID_FEAT_EDX_SEP = 1u << 11,
+	CPUID_FEAT_EDX_MTRR = 1u << 12,
+	CPUID_FEAT_EDX_PGE = 1u << 13,
+	CPUID_FEAT_EDX_MCA = 1u << 14,
+	CPUID_FEAT_EDX_CMOV = 1u << 15,
+	CPUID_FEAT_EDX_PAT = 1u << 16,
+	CPUID_FEAT_EDX_PSE36 = 1u << 17,
+	CPUID_FEAT_EDX_PSN = 1u << 18,
+	CPUID_FEAT_EDX_CLF = 1u << 19,
+	CPUID_FEAT_EDX_DTES = 1u << 21,
+	CPUID_FEAT_EDX_ACPI = 1u << 22,
+	CPUID_FEAT_EDX_MMX = 1u << 23,
+	CPUID_FEAT_EDX_FXSR = 1u << 24,
+	CPUID_FEAT_EDX_SSE = 1u << 25,
+	CPUID_FEAT_EDX_SSE2 = 1u << 26,
+	CPUID_FEAT_EDX_SS = 1u << 27,
+	CPUID_FEAT_EDX_HTT = 1u << 28,
+	CPUID_FEAT_EDX_TM1 = 1u << 29,
+	CPUID_FEAT_EDX_IA64 = 1u << 30,
+
+	CPUID_EXT_FEAT_EBX_FSGSBASE = 1u << 0,
+	CPUID_EXT_FEAT_EBX_SGX = 1u << 2,
+	CPUID_EXT_FEAT_EBX_BMI1 = 1u << 3,
+	CPUID_EXT_FEAT_EBX_HLE = 1u << 4,
+	CPUID_EXT_FEAT_EBX_AVX2 = 1u << 5,
+	CPUID_EXT_FEAT_EBX_SMEP = 1u << 7,
+	CPUID_EXT_FEAT_EBX_BMI2 = 1u << 8,
+	CPUID_EXT_FEAT_EBX_ERMS = 1u << 9,
+	CPUID_EXT_FEAT_EBX_INVPCID = 1u << 10,
+	CPUID_EXT_FEAT_EBX_RTM = 1u << 11,
+	CPUID_EXT_FEAT_EBX_PQM = 1u << 12,
+	CPUID_EXT_FEAT_EBX_MPX = 1u << 14,
+	CPUID_EXT_FEAT_EBX_PQE = 1u << 15,
+	CPUID_EXT_FEAT_EBX_AVX512F = 1u << 16,
+	CPUID_EXT_FEAT_EBX_AVX512DQ = 1u << 17,
+	CPUID_EXT_FEAT_EBX_RDSEED = 1u << 18,
+	CPUID_EXT_FEAT_EBX_ADX = 1u << 19,
+	CPUID_EXT_FEAT_EBX_SMAP = 1u << 20,
+	CPUID_EXT_FEAT_EBX_AVX512IFMA = 1u << 21,
+	CPUID_EXT_FEAT_EBX_PCOMMIT = 1u << 22,
+	CPUID_EXT_FEAT_EBX_CLFLUSHOPT = 1u << 23,
+	CPUID_EXT_FEAT_EBX_CLWB = 1u << 24,
+	CPUID_EXT_FEAT_EBX_INTELPT = 1u << 25,
+	CPUID_EXT_FEAT_EBX_AVX512PF = 1u << 26,
+	CPUID_EXT_FEAT_EBX_AVX512ER = 1u << 27,
+	CPUID_EXT_FEAT_EBX_AVX512CD = 1u << 28,
+	CPUID_EXT_FEAT_EBX_SHA = 1u << 29,
+	CPUID_EXT_FEAT_EBX_AVX512BW = 1u << 30,
+
+	CPUID_EXT_FEAT_ECX_PREFETCHWT1 = 1u << 0,
+	CPUID_EXT_FEAT_ECX_AVX512VBMI = 1u << 1,
+	CPUID_EXT_FEAT_ECX_UMIP = 1u << 2,
+	CPUID_EXT_FEAT_ECX_PKU = 1u << 3,
+	CPUID_EXT_FEAT_ECX_OSPKE = 1u << 4,
+	CPUID_EXT_FEAT_ECX_WAITPKG = 1u << 5,
+	CPUID_EXT_FEAT_ECX_AVX512VBMI2 = 1u << 6,
+	CPUID_EXT_FEAT_ECX_CETSS = 1u << 7,
+	CPUID_EXT_FEAT_ECX_GFNI = 1u << 8,
+	CPUID_EXT_FEAT_ECX_VAES = 1u << 9,
+	CPUID_EXT_FEAT_ECX_VPCLMULQDQ = 1u << 10,
+	CPUID_EXT_FEAT_ECX_AVX512VNNI = 1u << 11,
+	CPUID_EXT_FEAT_ECX_AVX512BITALG = 1u << 12,
+	CPUID_EXT_FEAT_ECX_AVX512VPOPCNTDQ = 1u << 14,
+	CPUID_EXT_FEAT_ECX_MAWAU1 = 1u << 17,
+	CPUID_EXT_FEAT_ECX_MAWAU2 = 1u << 18,
+	CPUID_EXT_FEAT_ECX_MAWAU3 = 1u << 19,
+	CPUID_EXT_FEAT_ECX_MAWAU4 = 1u << 20,
+	CPUID_EXT_FEAT_ECX_MAWAU5 = 1u << 21,
+	CPUID_EXT_FEAT_ECX_RDPID = 1u << 22,
+	CPUID_EXT_FEAT_ECX_CLDEMOTE = 1u << 25,
+	CPUID_EXT_FEAT_ECX_MOVDIRI = 1u << 27,
+	CPUID_EXT_FEAT_ECX_MOVDIR64B = 1u << 28,
+	CPUID_EXT_FEAT_ECX_ENQCMD = 1u << 29,
+	CPUID_EXT_FEAT_ECX_SGXLC = 1u << 30,
+
+	CPUID_EXT_INFO_EDX_NX = 1u << 20,
+};
+
+extern struct cpuid cpu_features;
+extern struct cpuid cpu_extended_information;
+extern struct cpuid cpu_extended_features;
+
+#endif
diff --git a/kernel/inc/drivers/gdt.h b/kernel/inc/drivers/gdt.h
new file mode 100644
index 0000000..7b9c65a
--- /dev/null
+++ b/kernel/inc/drivers/gdt.h
@@ -0,0 +1,68 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef GDT_H
+#define GDT_H
+
+#include <def.h>
+
+#define GDT_ROOT_CODE_GATE 1
+#define GDT_ROOT_DATA_GATE 2
+#define GDT_USER_CODE_GATE 3
+#define GDT_USER_DATA_GATE 4
+#define GDT_TSS_GATE 5
+
+#define GDT_SUPER_CODE_OFFSET (gdt_offset(GDT_ROOT_CODE_GATE))
+#define GDT_SUPER_DATA_OFFSET (gdt_offset(GDT_ROOT_DATA_GATE))
+#define GDT_USER_CODE_OFFSET (gdt_offset(GDT_USER_CODE_GATE) | 3)
+#define GDT_USER_DATA_OFFSET (gdt_offset(GDT_USER_DATA_GATE) | 3)
+#define GDT_TSS_OFFSET (gdt_offset(GDT_TSS_GATE))
+
+struct gdt_entry {
+	u16 limit_low;
+	u16 base_low;
+	u8 base_middle;
+	u8 access;
+	u8 granularity;
+	u8 base_high;
+} PACKED;
+
+struct gdt_ptr {
+	u16 limit;
+	void *base;
+} PACKED;
+
+struct tss_entry {
+	u32 prev_tss;
+	u32 esp0;
+	u32 ss0;
+	u32 esp1;
+	u32 ss1;
+	u32 esp2;
+	u32 ss2;
+	u32 cr3;
+	u32 eip;
+	u32 eflags;
+	u32 eax;
+	u32 ecx;
+	u32 edx;
+	u32 ebx;
+	u32 esp;
+	u32 ebp;
+	u32 esi;
+	u32 edi;
+	u32 es;
+	u32 cs;
+	u32 ss;
+	u32 ds;
+	u32 fs;
+	u32 gs;
+	u32 ldt;
+	u16 trap;
+	u16 iomap_base;
+} PACKED;
+
+CONST u8 gdt_offset(u8 gate);
+void gdt_install(u32 esp);
+void tss_set_stack(u32 esp);
+
+#endif
diff --git a/kernel/inc/drivers/ide.h b/kernel/inc/drivers/ide.h
new file mode 100644
index 0000000..dbe0652
--- /dev/null
+++ b/kernel/inc/drivers/ide.h
@@ -0,0 +1,75 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef IDE_H
+#define IDE_H
+
+#include <def.h>
+
+#define BLOCK_SIZE 1024
+#define BLOCK_COUNT 256 // BLOCK_SIZE / sizeof(u32)
+#define SECTOR_SIZE 512
+#define SECTOR_COUNT (BLOCK_SIZE / SECTOR_SIZE)
+
+#define ATA_PRIMARY_IO 0x1f0
+#define ATA_SECONDARY_IO 0x170
+
+// From spec
+#define ATA_PRIMARY 0x00
+#define ATA_SECONDARY 0x01
+#define ATA_READ 0x00
+#define ATA_WRITE 0x013
+#define ATA_MASTER 0x00
+#define ATA_SLAVE 0x01
+#define ATA_SR_BSY 0x80
+#define ATA_SR_DRDY 0x40
+#define ATA_SR_DF 0x20
+#define ATA_SR_DSC 0x10
+#define ATA_SR_DRQ 0x08
+#define ATA_SR_CORR 0x04
+#define ATA_SR_IDX 0x02
+#define ATA_SR_ERR 0x01
+#define ATA_REG_DATA 0x00
+#define ATA_REG_ERROR 0x01
+#define ATA_REG_FEATURES 0x01
+#define ATA_REG_SECCOUNT0 0x02
+#define ATA_REG_LBA0 0x03
+#define ATA_REG_LBA1 0x04
+#define ATA_REG_LBA2 0x05
+#define ATA_REG_HDDEVSEL 0x06
+#define ATA_REG_COMMAND 0x07
+#define ATA_REG_STATUS 0x07
+#define ATA_REG_SECCOUNT1 0x08
+#define ATA_REG_LBA3 0x09
+#define ATA_REG_LBA4 0x0a
+#define ATA_REG_LBA5 0x0b
+#define ATA_REG_CONTROL 0x0c
+#define ATA_REG_ALTSTATUS 0x0c
+#define ATA_REG_DEVADDRESS 0x0d
+#define ATA_CMD_READ_PIO 0x20
+#define ATA_CMD_READ_PIO_EXT 0x24
+#define ATA_CMD_READ_DMA 0xc8
+#define ATA_CMD_READ_DMA_EXT 0x25
+#define ATA_CMD_WRITE_PIO 0x30
+#define ATA_CMD_WRITE_PIO_EXT 0x34
+#define ATA_CMD_WRITE_DMA 0xca
+#define ATA_CMD_WRITE_DMA_EXT 0x35
+#define ATA_CMD_CACHE_FLUSH 0xe7
+#define ATA_CMD_CACHE_FLUSH_EXT 0xea
+#define ATA_CMD_PACKET 0xa0
+#define ATA_CMD_IDENTIFY_PACKET 0xa1
+#define ATA_CMD_IDENTIFY 0xec
+#define ATA_IDENT_DEVICETYPE 0
+#define ATA_IDENT_CYLINDERS 2
+#define ATA_IDENT_HEADS 6
+#define ATA_IDENT_SECTORS 12
+#define ATA_IDENT_SERIAL 20
+#define ATA_IDENT_MODEL 54
+#define ATA_IDENT_CAPABILITIES 98
+#define ATA_IDENT_FIELDVALID 106
+#define ATA_IDENT_MAX_LBA 120
+#define ATA_IDENT_COMMANDSETS 164
+#define ATA_IDENT_MAX_LBA_EXT 200
+
+void ata_install(void);
+
+#endif
diff --git a/kernel/inc/drivers/interrupts.h b/kernel/inc/drivers/interrupts.h
new file mode 100644
index 0000000..7c0c1e7
--- /dev/null
+++ b/kernel/inc/drivers/interrupts.h
@@ -0,0 +1,95 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef IDT_H
+#define IDT_H
+
+#include <def.h>
+
+struct regs {
+	u32 gs, fs, es, ds;
+	u32 edi, esi, ebp, esp, ebx, edx, ecx, eax;
+	u32 int_no, err_code;
+	u32 eip, cs, eflags, useresp, ss;
+};
+
+struct idt_entry {
+	u16 base_low;
+	u16 sel; // Kernel segment
+	u8 always0; // Always 0
+	u8 flags;
+	u16 base_high;
+} PACKED;
+
+struct idt_ptr {
+	u16 limit;
+	void *base;
+} PACKED;
+
+void idt_set_gate(u8 num, u32 base, u16 sel, u8 flags);
+
+void irq_install_handler(int irq, void (*handler)(struct regs *r)) NONNULL;
+void irq_uninstall_handler(int irq);
+
+void isr_install_handler(int isr, void (*handler)(struct regs *r)) NONNULL;
+void isr_uninstall_handler(int isr);
+void isr_panic(struct regs *r) NONNULL;
+
+void interrupts_install(void);
+
+// External handlers (ASM)
+
+extern void isr0(struct regs *r);
+extern void isr1(struct regs *r);
+extern void isr2(struct regs *r);
+extern void isr3(struct regs *r);
+extern void isr4(struct regs *r);
+extern void isr5(struct regs *r);
+extern void isr6(struct regs *r);
+extern void isr7(struct regs *r);
+extern void isr8(struct regs *r);
+extern void isr9(struct regs *r);
+extern void isr10(struct regs *r);
+extern void isr11(struct regs *r);
+extern void isr12(struct regs *r);
+extern void isr13(struct regs *r);
+extern void isr14(struct regs *r);
+extern void isr15(struct regs *r);
+extern void isr16(struct regs *r);
+extern void isr17(struct regs *r);
+extern void isr18(struct regs *r);
+extern void isr19(struct regs *r);
+extern void isr20(struct regs *r);
+extern void isr21(struct regs *r);
+extern void isr22(struct regs *r);
+extern void isr23(struct regs *r);
+extern void isr24(struct regs *r);
+extern void isr25(struct regs *r);
+extern void isr26(struct regs *r);
+extern void isr27(struct regs *r);
+extern void isr28(struct regs *r);
+extern void isr29(struct regs *r);
+extern void isr30(struct regs *r);
+extern void isr31(struct regs *r);
+extern void isr127(struct regs *r);
+extern void isr128(struct regs *r);
+
+extern void irq0(struct regs *r);
+extern void irq1(struct regs *r);
+extern void irq2(struct regs *r);
+extern void irq3(struct regs *r);
+extern void irq4(struct regs *r);
+extern void irq5(struct regs *r);
+extern void irq6(struct regs *r);
+extern void irq7(struct regs *r);
+extern void irq8(struct regs *r);
+extern void irq9(struct regs *r);
+extern void irq10(struct regs *r);
+extern void irq11(struct regs *r);
+extern void irq12(struct regs *r);
+extern void irq13(struct regs *r);
+extern void irq14(struct regs *r);
+extern void irq15(struct regs *r);
+extern void irq127(struct regs *r);
+extern void irq128(struct regs *r);
+
+#endif
diff --git a/kernel/inc/drivers/mbr.h b/kernel/inc/drivers/mbr.h
new file mode 100644
index 0000000..07f6da0
--- /dev/null
+++ b/kernel/inc/drivers/mbr.h
@@ -0,0 +1,28 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef MBR_H
+#define MBR_H
+
+#include <def.h>
+#include <fs.h>
+
+struct mbr_entry {
+	u8 attributes;
+	u8 chs_start[3];
+	u8 type;
+	u8 chs_end[3];
+	u32 start;
+	u32 size;
+} PACKED;
+
+struct mbr {
+	u8 bootstrap[440];
+	u32 signature;
+	u16 reserved;
+	struct mbr_entry entries[4];
+	u16 magic;
+} PACKED;
+
+u8 mbr_load(struct vfs_dev *dev);
+
+#endif
diff --git a/kernel/inc/drivers/pci.h b/kernel/inc/drivers/pci.h
new file mode 100644
index 0000000..9429f29
--- /dev/null
+++ b/kernel/inc/drivers/pci.h
@@ -0,0 +1,102 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef PCI_H
+#define PCI_H
+
+#include <def.h>
+
+#define PCI_VENDOR_ID 0x00 // 2
+#define PCI_DEVICE_ID 0x02 // 2
+#define PCI_COMMAND 0x04 // 2
+#define PCI_STATUS 0x06 // 2
+#define PCI_REVISION_ID 0x08 // 1
+
+#define PCI_PROG_IF 0x09 // 1
+#define PCI_SUBCLASS 0x0a // 1
+#define PCI_CLASS 0x0b // 1
+#define PCI_CACHE_LINE_SIZE 0x0c // 1
+#define PCI_LATENCY_TIMER 0x0d // 1
+#define PCI_HEADER_TYPE 0x0e // 1
+#define PCI_BIST 0x0f // 1
+#define PCI_BAR0 0x10 // 4
+#define PCI_BAR1 0x14 // 4
+#define PCI_BAR2 0x18 // 4
+#define PCI_BAR3 0x1C // 4
+#define PCI_BAR4 0x20 // 4
+#define PCI_BAR5 0x24 // 4
+
+#define PCI_INTERRUPT_LINE 0x3C // 1
+
+#define PCI_SECONDARY_BUS 0x19 // 1
+
+#define PCI_HEADER_TYPE_DEVICE 0
+#define PCI_HEADER_TYPE_BRIDGE 1
+#define PCI_HEADER_TYPE_CARDBUS 2
+
+#define PCI_TYPE_BRIDGE 0x0604
+#define PCI_TYPE_SATA 0x0106
+
+#define PCI_ADDRESS_PORT 0xCF8
+#define PCI_VALUE_PORT 0xCFC
+
+#define PCI_NONE 0xFFFF
+
+typedef void (*pci_func_t)(u32 device, u16 vendor_id, u16 device_id, void *extra);
+
+struct pci_device_descriptor {
+	u32 port_base;
+	u32 interrupt;
+
+	u8 bus;
+	u8 slot;
+	u8 func;
+
+	u16 vendor_id;
+	u16 device_id;
+
+	u8 class_id;
+	u8 subclass_id;
+	u8 interface_id;
+
+	u8 revision;
+};
+
+static inline u8 pci_extract_bus(u32 device)
+{
+	return (u8)((device >> 16));
+}
+
+static inline u8 pci_extract_slot(u32 device)
+{
+	return (u8)((device >> 8));
+}
+
+static inline u8 pci_extract_func(u32 device)
+{
+	return (u8)(device);
+}
+
+static inline u32 pci_get_addr(u32 device, int field)
+{
+	return 0x80000000 | (u32)(pci_extract_bus(device) << 16) |
+	       (u32)(pci_extract_slot(device) << 11) | (u32)(pci_extract_func(device) << 8) |
+	       ((field)&0xFC);
+}
+
+static inline u32 pci_box_device(int bus, int slot, int func)
+{
+	return (u32)((bus << 16) | (slot << 8) | func);
+}
+
+u32 pci_read_field(u32 device, int field, int size);
+void pci_write_field(u32 device, int field, u32 value);
+u16 pci_find_type(u32 dev);
+void pci_scan_hit(pci_func_t f, u32 dev, void *extra) NONNULL;
+void pci_scan_func(pci_func_t f, int type, int bus, int slot, int func, void *extra) NONNULL;
+void pci_scan_slot(pci_func_t f, int type, int bus, int slot, void *extra) NONNULL;
+void pci_scan_bus(pci_func_t f, int type, int bus, void *extra) NONNULL;
+void pci_scan(pci_func_t f, int type, void *extra) NONNULL;
+int pci_get_interrupt(u32 device);
+void pci_install(void);
+
+#endif
diff --git a/kernel/inc/drivers/ps2.h b/kernel/inc/drivers/ps2.h
new file mode 100644
index 0000000..5db8b57
--- /dev/null
+++ b/kernel/inc/drivers/ps2.h
@@ -0,0 +1,59 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef PS2_H
+#define PS2_H
+
+#include <def.h>
+
+#define PS2_ACK 0xfa
+#define PS2_RESEND 0xfe
+
+#define PS2_TYPE_STANDARD_MOUSE 0x0000
+#define PS2_TYPE_WHEEL_MOUSE 0x0003
+#define PS2_TYPE_BUTTON_MOUSE 0x0004
+#define PS2_TYPE_TRANSLATION_KEYBOARD1 0xab41
+#define PS2_TYPE_TRANSLATION_KEYBOARD2 0xabc1
+#define PS2_TYPE_STANDARD_KEYBOARD 0xab83
+
+#define PS2_KEYBOARD(type)                                                                         \
+	((type) == PS2_TYPE_TRANSLATION_KEYBOARD1 || (type) == PS2_TYPE_TRANSLATION_KEYBOARD2 ||   \
+	 (type) == PS2_TYPE_STANDARD_KEYBOARD)
+#define PS2_MOUSE(type)                                                                            \
+	((type) == PS2_TYPE_STANDARD_MOUSE || (type) == PS2_TYPE_WHEEL_MOUSE ||                    \
+	 (type) == PS2_TYPE_BUTTON_MOUSE)
+
+struct ps2_status {
+	u8 in_full : 1;
+	u8 out_full : 1;
+	u8 system : 1;
+	u8 command : 1;
+	u8 reserved : 2;
+	u8 error_time : 1;
+	u8 error_parity : 1;
+};
+
+struct ps2_config {
+	u8 first_int : 1;
+	u8 second_int : 1;
+	u8 running : 1;
+	u8 zero1 : 1;
+	u8 first_clock_disabled : 1;
+	u8 second_clock_disabled : 1;
+	u8 first_translation : 1;
+	u8 zero2 : 1;
+};
+
+u8 ps2_read_data(void);
+u8 ps2_write_data(u8 byte);
+u8 ps2_write_device(u8 device, u8 data);
+
+void ps2_detect(void);
+u8 ps2_keyboard_detect(void);
+u8 ps2_mouse_detect(void);
+void ps2_mouse_enable(u8 device);
+void ps2_mouse_install(u8 device);
+
+void ps2_keyboard_reset(void);
+void ps2_keyboard_install(u8 device);
+
+#endif
diff --git a/kernel/inc/drivers/rtc.h b/kernel/inc/drivers/rtc.h
new file mode 100644
index 0000000..44a9c9e
--- /dev/null
+++ b/kernel/inc/drivers/rtc.h
@@ -0,0 +1,21 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef RTC_H
+#define RTC_H
+
+#include <def.h>
+
+struct rtc {
+	u8 second;
+	u8 minute;
+	u8 hour;
+	u8 day;
+	u8 month;
+	u32 year;
+};
+
+struct rtc rtc_read(void);
+u32 rtc_stamp(void);
+CLEAR void rtc_install(void);
+
+#endif
diff --git a/kernel/inc/drivers/rtl8139.h b/kernel/inc/drivers/rtl8139.h
new file mode 100644
index 0000000..0d748af
--- /dev/null
+++ b/kernel/inc/drivers/rtl8139.h
@@ -0,0 +1,36 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef RTL8139_H
+#define RTL8139_H
+
+#include <def.h>
+
+#define RX_BUF_SIZE 0x2000
+
+#define RTL8139_VENDOR_ID 0x10ec
+#define RTL8139_DEVICE_ID 0x8139
+
+#define RTL_ROK (1 << 0)
+#define RTL_TOK (1 << 2)
+
+#define RTL_PORT_MAC 0x00
+#define RTL_PORT_MAR 0x08
+#define RTL_PORT_TXSTAT 0x10
+#define RTL_PORT_TXBUF 0x20
+#define RTL_PORT_RBSTART 0x30
+#define RTL_PORT_CMD 0x37
+#define RTL_PORT_RXPTR 0x38
+#define RTL_PORT_RXADDR 0x3A
+#define RTL_PORT_IMR 0x3C
+#define RTL_PORT_ISR 0x3E
+#define RTL_PORT_TCR 0x40
+#define RTL_PORT_RCR 0x44
+#define RTL_PORT_RXMISS 0x4C
+#define RTL_PORT_CONFIG 0x52
+
+int rtl8139_install(void);
+int rtl8139_installed(void);
+void rtl8139_send_packet(void *data, u32 len) NONNULL;
+u8 *rtl8139_get_mac(void);
+
+#endif
diff --git a/kernel/inc/drivers/serial.h b/kernel/inc/drivers/serial.h
new file mode 100644
index 0000000..72c9dc1
--- /dev/null
+++ b/kernel/inc/drivers/serial.h
@@ -0,0 +1,14 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef SERIAL_H
+#define SERIAL_H
+
+#include <def.h>
+
+void serial_install(void);
+void serial_enable(void);
+void serial_disable(void);
+void serial_print(const char *data) NONNULL;
+void serial_put(char ch);
+
+#endif
diff --git a/kernel/inc/drivers/timer.h b/kernel/inc/drivers/timer.h
new file mode 100644
index 0000000..9ff23f8
--- /dev/null
+++ b/kernel/inc/drivers/timer.h
@@ -0,0 +1,17 @@
+// MIT License, Copyright (c) 2020 Marvin Borner
+
+#ifndef TIMER_H
+#define TIMER_H
+
+#include <def.h>
+#include <drivers/interrupts.h>
+
+u32 timer_get(void);
+void timer_wait(u32 ticks);
+void timer_install(void);
+void timer_handler(struct regs *r) NONNULL;
+
+void scheduler_enable(void);
+void scheduler_disable(void);
+
+#endif
diff --git a/kernel/inc/drivers/vbe.h b/kernel/inc/drivers/vbe.h
new file mode 100644
index 0000000..5b2275a
--- /dev/null
+++ b/kernel/inc/drivers/vbe.h
@@ -0,0 +1,10 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef VBE_H
+#define VBE_H
+
+#include <mm.h>
+
+void vbe_install(u32 data) NONNULL;
+
+#endif
diff --git a/kernel/inc/drivers/vmware.h b/kernel/inc/drivers/vmware.h
new file mode 100644
index 0000000..243c624
--- /dev/null
+++ b/kernel/inc/drivers/vmware.h
@@ -0,0 +1,12 @@
+// MIT License, Copyright (c) 2021 Marvin Borner
+
+#ifndef VMWARE_H
+#define VMWARE_H
+
+#include <def.h>
+
+u8 vmware_detect(void);
+u8 vmware_mouse_detect(void);
+void vmware_mouse_install(u8 device);
+
+#endif