diff options
author | Marvin Borner | 2021-02-21 15:45:41 +0100 |
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committer | Marvin Borner | 2021-02-21 15:45:41 +0100 |
commit | afeb7e4f00eff33e9e1cfcb766825e7c87f5f1d1 (patch) | |
tree | 87572c38c6cfd3bf49119ecb63de2e8c3ad4fb02 /libc/inc/cpu.h | |
parent | 17b83714ecc713f3faebf668a3d286e531f41859 (diff) |
Activated SSE/FPU features for better performance
Diffstat (limited to 'libc/inc/cpu.h')
-rw-r--r-- | libc/inc/cpu.h | 84 |
1 files changed, 71 insertions, 13 deletions
diff --git a/libc/inc/cpu.h b/libc/inc/cpu.h index 033743d..fa82fbe 100644 --- a/libc/inc/cpu.h +++ b/libc/inc/cpu.h @@ -5,8 +5,6 @@ #include <def.h> -enum cpuid_requests { CPUID_VENDOR_STRING, CPUID_FEATURES, CPUID_TLB, CPUID_SERIAL }; - u8 inb(u16 port); u16 inw(u16 port); u32 inl(u16 port); @@ -16,24 +14,84 @@ void outb(u16 port, u8 data); void outw(u16 port, u16 data); void outl(u16 port, u32 data); -void cpuid(int code, u32 *a, u32 *b, u32 *c, u32 *d); -char *cpu_string(char buf[12]); -void cpu_print(void); +static inline void spinlock(int *ptr) +{ + int prev; + do + __asm__ volatile("lock xchgl %0,%1" : "=a"(prev) : "m"(*ptr), "a"(1)); + while (prev); +} #ifdef kernel +void cpu_print(void); +void cpu_enable_features(void); +void fpu_restore(void); + void cli(void); void sti(void); void hlt(void); void idle(void); void loop(void); -#endif -static inline void spinlock(int *ptr) -{ - int prev; - do - __asm__ volatile("lock xchgl %0,%1" : "=a"(prev) : "m"(*ptr), "a"(1)); - while (prev); -} +enum cpuid_requests { CPUID_VENDOR_STRING, CPUID_FEATURES, CPUID_TLB, CPUID_SERIAL }; +enum cpuid_features { + CPUID_FEAT_ECX_SSE3 = 1 << 0, + CPUID_FEAT_ECX_PCLMUL = 1 << 1, + CPUID_FEAT_ECX_DTES64 = 1 << 2, + CPUID_FEAT_ECX_MONITOR = 1 << 3, + CPUID_FEAT_ECX_DS_CPL = 1 << 4, + CPUID_FEAT_ECX_VMX = 1 << 5, + CPUID_FEAT_ECX_SMX = 1 << 6, + CPUID_FEAT_ECX_EST = 1 << 7, + CPUID_FEAT_ECX_TM2 = 1 << 8, + CPUID_FEAT_ECX_SSSE3 = 1 << 9, + CPUID_FEAT_ECX_CID = 1 << 10, + CPUID_FEAT_ECX_FMA = 1 << 12, + CPUID_FEAT_ECX_CX16 = 1 << 13, + CPUID_FEAT_ECX_ETPRD = 1 << 14, + CPUID_FEAT_ECX_PDCM = 1 << 15, + CPUID_FEAT_ECX_PCIDE = 1 << 17, + CPUID_FEAT_ECX_DCA = 1 << 18, + CPUID_FEAT_ECX_SSE4_1 = 1 << 19, + CPUID_FEAT_ECX_SSE4_2 = 1 << 20, + CPUID_FEAT_ECX_x2APIC = 1 << 21, + CPUID_FEAT_ECX_MOVBE = 1 << 22, + CPUID_FEAT_ECX_POPCNT = 1 << 23, + CPUID_FEAT_ECX_AES = 1 << 25, + CPUID_FEAT_ECX_XSAVE = 1 << 26, + CPUID_FEAT_ECX_OSXSAVE = 1 << 27, + CPUID_FEAT_ECX_AVX = 1 << 28, + + CPUID_FEAT_EDX_FPU = 1 << 0, + CPUID_FEAT_EDX_VME = 1 << 1, + CPUID_FEAT_EDX_DE = 1 << 2, + CPUID_FEAT_EDX_PSE = 1 << 3, + CPUID_FEAT_EDX_TSC = 1 << 4, + CPUID_FEAT_EDX_MSR = 1 << 5, + CPUID_FEAT_EDX_PAE = 1 << 6, + CPUID_FEAT_EDX_MCE = 1 << 7, + CPUID_FEAT_EDX_CX8 = 1 << 8, + CPUID_FEAT_EDX_APIC = 1 << 9, + CPUID_FEAT_EDX_SEP = 1 << 11, + CPUID_FEAT_EDX_MTRR = 1 << 12, + CPUID_FEAT_EDX_PGE = 1 << 13, + CPUID_FEAT_EDX_MCA = 1 << 14, + CPUID_FEAT_EDX_CMOV = 1 << 15, + CPUID_FEAT_EDX_PAT = 1 << 16, + CPUID_FEAT_EDX_PSE36 = 1 << 17, + CPUID_FEAT_EDX_PSN = 1 << 18, + CPUID_FEAT_EDX_CLF = 1 << 19, + CPUID_FEAT_EDX_DTES = 1 << 21, + CPUID_FEAT_EDX_ACPI = 1 << 22, + CPUID_FEAT_EDX_MMX = 1 << 23, + CPUID_FEAT_EDX_FXSR = 1 << 24, + CPUID_FEAT_EDX_SSE = 1 << 25, + CPUID_FEAT_EDX_SSE2 = 1 << 26, + CPUID_FEAT_EDX_SS = 1 << 27, + CPUID_FEAT_EDX_HTT = 1 << 28, + CPUID_FEAT_EDX_TM1 = 1 << 29, + CPUID_FEAT_EDX_IA64 = 1 << 30, +}; +#endif #endif |