Moved source to kernel directory

7 files changed, 780 insertions, 0 deletions

diff --git a/src/kernel/interrupts/idt.asm b/src/kernel/interrupts/idt.asm
new file mode 100644
index 0000000..90eab47
--- /dev/null
+++ b/src/kernel/interrupts/idt.asm
@@ -0,0 +1,6 @@
+; IDT loader
+global idt_load
+extern idtp
+idt_load:
+    lidt [idtp]
+    ret
diff --git a/src/kernel/interrupts/idt.c b/src/kernel/interrupts/idt.c
new file mode 100644
index 0000000..ba71339
--- /dev/null
+++ b/src/kernel/interrupts/idt.c
@@ -0,0 +1,46 @@
+#include "../lib/lib.h"
+
+struct idt_entry {
+    unsigned short base_lo;
+    unsigned short sel; // Kernel segment
+    unsigned char always0; // Always 0
+    unsigned char flags;
+    unsigned short base_hi;
+} __attribute__((packed));
+
+struct idt_ptr {
+    unsigned short limit;
+    unsigned int base;
+} __attribute__((packed));
+
+// Initialize IDT with 256 entries
+struct idt_entry idt[256];
+struct idt_ptr idtp;
+
+// Defined in idt.asm
+extern void idt_load();
+
+void idt_set_gate(unsigned char num, unsigned long base, unsigned short sel, unsigned char flags) {
+    // Specify the interrupt routine's base address
+    idt[num].base_lo = (base & 0xFFFF);
+    idt[num].base_hi = (base >> 16) & 0xFFFF;
+
+    // Set selector/segment of IDT entry
+    idt[num].sel = sel;
+    idt[num].always0 = 0;
+    idt[num].flags = flags;
+}
+
+// Install IDT
+void idt_install() {
+    // Set IDT pointer and limit
+    idtp.limit = (sizeof(struct idt_entry) * 256) - 1;
+    idtp.base = &idt;
+
+    // Clear IDT by setting memory cells to 0
+    memory_set(&idt, 0, sizeof(struct idt_entry) * 256);
+
+    // TODO: Add method to add ISRs to IDT
+
+    idt_load();
+}
diff --git a/src/kernel/interrupts/interrupts.h b/src/kernel/interrupts/interrupts.h
new file mode 100644
index 0000000..755a633
--- /dev/null
+++ b/src/kernel/interrupts/interrupts.h
@@ -0,0 +1,30 @@
+#ifndef MELVIX_INTERRUPTS_H
+#define MELVIX_INTERRUPTS_H
+
+// IDT
+void idt_install();
+
+void idt_set_gate(unsigned char num, unsigned long base, unsigned short sel, unsigned char flags);
+
+// ISRS
+void isrs_install();
+
+struct regs {
+    unsigned int gs, fs, es, ds;
+    unsigned int edi, esi, ebp, esp, ebx, edx, ecx, eax;
+    unsigned int int_no, err_code;
+    unsigned int eip, cs, eflags, useresp, ss;
+};
+
+// IRQ
+void irq_install();
+
+void irq_install_handler(int irq, void (*handler)(struct regs *r));
+
+void irq_uninstall_handler(int irq);
+
+void irq_handler(struct regs *r);
+
+int irq_is_installed(int irq);
+
+#endif
diff --git a/src/kernel/interrupts/irq.asm b/src/kernel/interrupts/irq.asm
new file mode 100644
index 0000000..c485613
--- /dev/null
+++ b/src/kernel/interrupts/irq.asm
@@ -0,0 +1,157 @@
+global irq0
+global irq1
+global irq2
+global irq3
+global irq4
+global irq5
+global irq6
+global irq7
+global irq8
+global irq9
+global irq10
+global irq11
+global irq12
+global irq13
+global irq14
+global irq15
+
+; 32: IRQ0
+irq0:
+    cli
+    push byte 0
+    push byte 32
+    jmp irq_common_stub
+
+; 33: IRQ1
+irq1:
+    cli
+    push byte 0
+    push byte 33
+    jmp irq_common_stub
+
+; 34: IRQ2
+irq2:
+    cli
+    push byte 0
+    push byte 34
+    jmp irq_common_stub
+
+; 35: IRQ3
+irq3:
+    cli
+    push byte 0
+    push byte 35
+    jmp irq_common_stub
+
+; 36: IRQ4
+irq4:
+    cli
+    push byte 0
+    push byte 36
+    jmp irq_common_stub
+
+; 37: IRQ5
+irq5:
+    cli
+    push byte 0
+    push byte 37
+    jmp irq_common_stub
+
+; 38: IRQ6
+irq6:
+    cli
+    push byte 0
+    push byte 38
+    jmp irq_common_stub
+
+; 39: IRQ7
+irq7:
+    cli
+    push byte 0
+    push byte 39
+    jmp irq_common_stub
+
+; 40: IRQ8
+irq8:
+    cli
+    push byte 0
+    push byte 40
+    jmp irq_common_stub
+
+; 41: IRQ9
+irq9:
+    cli
+    push byte 0
+    push byte 41
+    jmp irq_common_stub
+
+; 42: IRQ10
+irq10:
+    cli
+    push byte 0
+    push byte 42
+    jmp irq_common_stub
+
+; 43: IRQ11
+irq11:
+    cli
+    push byte 0
+    push byte 43
+    jmp irq_common_stub
+
+; 44: IRQ12
+irq12:
+    cli
+    push byte 0
+    push byte 44
+    jmp irq_common_stub
+
+; 45: IRQ13
+irq13:
+    cli
+    push byte 0
+    push byte 45
+    jmp irq_common_stub
+
+; 46: IRQ14
+irq14:
+    cli
+    push byte 0
+    push byte 46
+    jmp irq_common_stub
+
+; 47: IRQ15
+irq15:
+    cli
+    push byte 0
+    push byte 47
+    jmp irq_common_stub
+
+extern irq_handler
+
+irq_common_stub:
+    pusha
+    push ds
+    push es
+    push fs
+    push gs
+
+    mov ax, 0x10
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax
+    mov eax, esp
+
+    push eax
+    mov eax, irq_handler
+    call eax
+    pop eax
+
+    pop gs
+    pop fs
+    pop es
+    pop ds
+    popa
+    add esp, 8
+    iret
diff --git a/src/kernel/interrupts/irq.c b/src/kernel/interrupts/irq.c
new file mode 100644
index 0000000..cf9e1fe
--- /dev/null
+++ b/src/kernel/interrupts/irq.c
@@ -0,0 +1,109 @@
+#include "../io/io.h"
+#include "interrupts.h"
+#include "../graphics/graphics.h"
+
+extern void irq0();
+
+extern void irq1();
+
+extern void irq2();
+
+extern void irq3();
+
+extern void irq4();
+
+extern void irq5();
+
+extern void irq6();
+
+extern void irq7();
+
+extern void irq8();
+
+extern void irq9();
+
+extern void irq10();
+
+extern void irq11();
+
+extern void irq12();
+
+extern void irq13();
+
+extern void irq14();
+
+extern void irq15();
+
+// Array to handle custom IRQ handlers
+void *irq_routines[16] = {
+        0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, 0, 0, 0, 0, 0
+};
+
+// Install custom IRQ handler
+void irq_install_handler(int irq, void (*handler)(struct regs *r)) {
+    irq_routines[irq] = handler;
+}
+
+// Removes the custom IRQ handler
+void irq_uninstall_handler(int irq) {
+    irq_routines[irq] = 0;
+}
+
+int irq_is_installed(int irq) {
+    return irq_routines[irq] != 0;
+}
+
+// Remap IRQs for protected mode compatibility via the PIC
+void irq_remap(void) {
+    send(0x20, 0x11);
+    send(0xA0, 0x11);
+    send(0x21, 0x20);
+    send(0xA1, 0x28);
+    send(0x21, 0x04);
+    send(0xA1, 0x02);
+    send(0x21, 0x01);
+    send(0xA1, 0x01);
+    send(0x21, 0x0);
+    send(0xA1, 0x0);
+}
+
+// Map ISRs to the correct entries in the IDT
+void irq_install() {
+    irq_remap();
+    idt_set_gate(32, (unsigned) irq0, 0x08, 0x8E);
+    idt_set_gate(33, (unsigned) irq1, 0x08, 0x8E);
+    idt_set_gate(34, (unsigned) irq2, 0x08, 0x8E);
+    idt_set_gate(35, (unsigned) irq3, 0x08, 0x8E);
+    idt_set_gate(36, (unsigned) irq4, 0x08, 0x8E);
+    idt_set_gate(37, (unsigned) irq5, 0x08, 0x8E);
+    idt_set_gate(38, (unsigned) irq6, 0x08, 0x8E);
+    idt_set_gate(39, (unsigned) irq7, 0x08, 0x8E);
+    idt_set_gate(40, (unsigned) irq8, 0x08, 0x8E);
+    idt_set_gate(41, (unsigned) irq9, 0x08, 0x8E);
+    idt_set_gate(42, (unsigned) irq10, 0x08, 0x8E);
+    idt_set_gate(43, (unsigned) irq11, 0x08, 0x8E);
+    idt_set_gate(44, (unsigned) irq12, 0x08, 0x8E);
+    idt_set_gate(45, (unsigned) irq13, 0x08, 0x8E);
+    idt_set_gate(46, (unsigned) irq14, 0x08, 0x8E);
+    idt_set_gate(47, (unsigned) irq15, 0x08, 0x8E);
+}
+
+// Handle IRQ ISRs
+void irq_handler(struct regs *r) {
+    void (*handler)(struct regs *r);
+
+    // Execute custom handler if exists
+    handler = irq_routines[r->int_no - 32];
+    if (handler) {
+        handler(r);
+    }
+
+    // Send end of interrupt to second (slave) IRQ controller
+    if (r->int_no >= 40) {
+        send(0xA0, 0x20);
+    }
+
+    // Send end of interrupt to master interrupt controller
+    send(0x20, 0x20);
+}
diff --git a/src/kernel/interrupts/isr.asm b/src/kernel/interrupts/isr.asm
new file mode 100644
index 0000000..cf75157
--- /dev/null
+++ b/src/kernel/interrupts/isr.asm
@@ -0,0 +1,277 @@
+global isr0
+global isr1
+global isr2
+global isr3
+global isr4
+global isr5
+global isr6
+global isr7
+global isr8
+global isr9
+global isr10
+global isr11
+global isr12
+global isr13
+global isr14
+global isr15
+global isr16
+global isr17
+global isr18
+global isr19
+global isr20
+global isr21
+global isr22
+global isr23
+global isr24
+global isr25
+global isr26
+global isr27
+global isr28
+global isr29
+global isr30
+global isr31
+
+; 0: Divide By Zero Exception
+isr0:
+    cli
+    push byte 0
+    push byte 0
+    jmp isr_common_stub
+
+; 1: Debug Exception
+isr1:
+    cli
+    push byte 0
+    push byte 1
+    jmp isr_common_stub
+
+; 2: Non Maskable Interrupt Exception
+isr2:
+    cli
+    push byte 0
+    push byte 2
+    jmp isr_common_stub
+
+; 3: Int 3 Exception
+isr3:
+    cli
+    push byte 0
+    push byte 3
+    jmp isr_common_stub
+
+; 4: INTO Exception
+isr4:
+    cli
+    push byte 0
+    push byte 4
+    jmp isr_common_stub
+
+; 5: Out of Bounds Exception
+isr5:
+    cli
+    push byte 0
+    push byte 5
+    jmp isr_common_stub
+
+; 6: Invalid Opcode Exception
+isr6:
+    cli
+    push byte 0
+    push byte 6
+    jmp isr_common_stub
+
+; 7: Coprocessor Not Available Exception
+isr7:
+    cli
+    push byte 0
+    push byte 7
+    jmp isr_common_stub
+
+; 8: Double Fault Exception (With Error Code!)
+isr8:
+    cli
+    push byte 8
+    jmp isr_common_stub
+
+; 9: Coprocessor Segment Overrun Exception
+isr9:
+    cli
+    push byte 0
+    push byte 9
+    jmp isr_common_stub
+
+; 10: Bad TSS Exception (With Error Code!)
+isr10:
+    cli
+    push byte 10
+    jmp isr_common_stub
+
+; 11: Segment Not Present Exception (With Error Code!)
+isr11:
+    cli
+    push byte 11
+    jmp isr_common_stub
+
+; 12: Stack Fault Exception (With Error Code!)
+isr12:
+    cli
+    push byte 12
+    jmp isr_common_stub
+
+; 13: General Protection Fault Exception (With Error Code!)
+isr13:
+    cli
+    push byte 13
+    jmp isr_common_stub
+
+; 14: Page Fault Exception (With Error Code!)
+isr14:
+    cli
+    push byte 14
+    jmp isr_common_stub
+
+; 15: Reserved Exception
+isr15:
+    cli
+    push byte 0
+    push byte 15
+    jmp isr_common_stub
+
+; 16: Floating Point Exception
+isr16:
+    cli
+    push byte 0
+    push byte 16
+    jmp isr_common_stub
+
+; 17: Alignment Check Exception
+isr17:
+    cli
+    push byte 0
+    push byte 17
+    jmp isr_common_stub
+
+; 18: Machine Check Exception
+isr18:
+    cli
+    push byte 0
+    push byte 18
+    jmp isr_common_stub
+
+; 19: Reserved
+isr19:
+    cli
+    push byte 0
+    push byte 19
+    jmp isr_common_stub
+
+; 20: Reserved
+isr20:
+    cli
+    push byte 0
+    push byte 20
+    jmp isr_common_stub
+
+; 21: Reserved
+isr21:
+    cli
+    push byte 0
+    push byte 21
+    jmp isr_common_stub
+
+; 22: Reserved
+isr22:
+    cli
+    push byte 0
+    push byte 22
+    jmp isr_common_stub
+
+; 23: Reserved
+isr23:
+    cli
+    push byte 0
+    push byte 23
+    jmp isr_common_stub
+
+; 24: Reserved
+isr24:
+    cli
+    push byte 0
+    push byte 24
+    jmp isr_common_stub
+
+; 25: Reserved
+isr25:
+    cli
+    push byte 0
+    push byte 25
+    jmp isr_common_stub
+
+; 26: Reserved
+isr26:
+    cli
+    push byte 0
+    push byte 26
+    jmp isr_common_stub
+
+; 27: Reserved
+isr27:
+    cli
+    push byte 0
+    push byte 27
+    jmp isr_common_stub
+
+; 28: Reserved
+isr28:
+    cli
+    push byte 0
+    push byte 28
+    jmp isr_common_stub
+
+; 29: Reserved
+isr29:
+    cli
+    push byte 0
+    push byte 29
+    jmp isr_common_stub
+
+; 30: Reserved
+isr30:
+    cli
+    push byte 0
+    push byte 30
+    jmp isr_common_stub
+
+; 31: Reserved
+isr31:
+    cli
+    push byte 0
+    push byte 31
+    jmp isr_common_stub
+
+extern fault_handler
+
+; Stores the ISR in the stack and calls the C fault handler
+isr_common_stub:
+    pusha
+    push ds
+    push es
+    push fs
+    push gs
+    mov ax, 0x10
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax
+    mov eax, esp
+    push eax
+    mov eax, fault_handler
+    call eax
+    pop eax
+    pop gs
+    pop fs
+    pop es
+    pop ds
+    popa
+    add esp, 8
+    iret
diff --git a/src/kernel/interrupts/isr.c b/src/kernel/interrupts/isr.c
new file mode 100644
index 0000000..8da7919
--- /dev/null
+++ b/src/kernel/interrupts/isr.c
@@ -0,0 +1,155 @@
+#include "../graphics/graphics.h"
+#include "interrupts.h"
+
+// Defined in isr.asm
+extern void isr0();
+
+extern void isr1();
+
+extern void isr2();
+
+extern void isr3();
+
+extern void isr4();
+
+extern void isr5();
+
+extern void isr6();
+
+extern void isr7();
+
+extern void isr8();
+
+extern void isr9();
+
+extern void isr10();
+
+extern void isr11();
+
+extern void isr12();
+
+extern void isr13();
+
+extern void isr14();
+
+extern void isr15();
+
+extern void isr16();
+
+extern void isr17();
+
+extern void isr18();
+
+extern void isr19();
+
+extern void isr20();
+
+extern void isr21();
+
+extern void isr22();
+
+extern void isr23();
+
+extern void isr24();
+
+extern void isr25();
+
+extern void isr26();
+
+extern void isr27();
+
+extern void isr28();
+
+extern void isr29();
+
+extern void isr30();
+
+extern void isr31();
+
+// Install ISRs in IDT
+void isrs_install() {
+    idt_set_gate(0, (unsigned) isr0, 0x08, 0x8E);
+    idt_set_gate(1, (unsigned) isr1, 0x08, 0x8E);
+    idt_set_gate(2, (unsigned) isr2, 0x08, 0x8E);
+    idt_set_gate(3, (unsigned) isr3, 0x08, 0x8E);
+    idt_set_gate(4, (unsigned) isr4, 0x08, 0x8E);
+    idt_set_gate(5, (unsigned) isr5, 0x08, 0x8E);
+    idt_set_gate(6, (unsigned) isr6, 0x08, 0x8E);
+    idt_set_gate(7, (unsigned) isr7, 0x08, 0x8E);
+
+    idt_set_gate(8, (unsigned) isr8, 0x08, 0x8E);
+    idt_set_gate(9, (unsigned) isr9, 0x08, 0x8E);
+    idt_set_gate(10, (unsigned) isr10, 0x08, 0x8E);
+    idt_set_gate(11, (unsigned) isr11, 0x08, 0x8E);
+    idt_set_gate(12, (unsigned) isr12, 0x08, 0x8E);
+    idt_set_gate(13, (unsigned) isr13, 0x08, 0x8E);
+    idt_set_gate(14, (unsigned) isr14, 0x08, 0x8E);
+    idt_set_gate(15, (unsigned) isr15, 0x08, 0x8E);
+
+    idt_set_gate(16, (unsigned) isr16, 0x08, 0x8E);
+    idt_set_gate(17, (unsigned) isr17, 0x08, 0x8E);
+    idt_set_gate(18, (unsigned) isr18, 0x08, 0x8E);
+    idt_set_gate(19, (unsigned) isr19, 0x08, 0x8E);
+    idt_set_gate(20, (unsigned) isr20, 0x08, 0x8E);
+    idt_set_gate(21, (unsigned) isr21, 0x08, 0x8E);
+    idt_set_gate(22, (unsigned) isr22, 0x08, 0x8E);
+    idt_set_gate(23, (unsigned) isr23, 0x08, 0x8E);
+
+    idt_set_gate(24, (unsigned) isr24, 0x08, 0x8E);
+    idt_set_gate(25, (unsigned) isr25, 0x08, 0x8E);
+    idt_set_gate(26, (unsigned) isr26, 0x08, 0x8E);
+    idt_set_gate(27, (unsigned) isr27, 0x08, 0x8E);
+    idt_set_gate(28, (unsigned) isr28, 0x08, 0x8E);
+    idt_set_gate(29, (unsigned) isr29, 0x08, 0x8E);
+    idt_set_gate(30, (unsigned) isr30, 0x08, 0x8E);
+    idt_set_gate(31, (unsigned) isr31, 0x08, 0x8E);
+}
+
+// Error exception messages
+const char *exception_messages[] = {
+        "Division By Zero",
+        "Debug",
+        "Non Maskable Interrupt",
+        "Breakpoint",
+        "Into Detected Overflow",
+        "Out of Bounds",
+        "Invalid Opcode",
+        "No Coprocessor",
+
+        "Double Fault",
+        "Coprocessor Segment Overrun",
+        "Bad TSS",
+        "Segment Not Present",
+        "Stack Fault",
+        "General Protection Fault",
+        "Page Fault",
+        "Unknown Interrupt",
+
+        "Coprocessor Fault",
+        "Alignment Check",
+        "Machine Check",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved",
+        "Reserved"
+};
+
+// Master exception handler - halt via endless loop
+void fault_handler(struct regs *r) {
+    if (r->int_no < 32) {
+        terminal_write_string("\n");
+        terminal_write_string(exception_messages[r->int_no]);
+        terminal_write_string(" Exception. System Halted!\n");
+        for (;;);
+    }
+}