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-rw-r--r--src/kernel/pci/pci.h108
1 files changed, 108 insertions, 0 deletions
diff --git a/src/kernel/pci/pci.h b/src/kernel/pci/pci.h
new file mode 100644
index 0000000..ed648e1
--- /dev/null
+++ b/src/kernel/pci/pci.h
@@ -0,0 +1,108 @@
+#ifndef MELVIX_PCI_H
+#define MELVIX_PCI_H
+
+#include <stdint.h>
+
+#define PCI_VENDOR_ID 0x00 // 2
+#define PCI_DEVICE_ID 0x02 // 2
+#define PCI_COMMAND 0x04 // 2
+#define PCI_STATUS 0x06 // 2
+#define PCI_REVISION_ID 0x08 // 1
+
+#define PCI_PROG_IF 0x09 // 1
+#define PCI_SUBCLASS 0x0a // 1
+#define PCI_CLASS 0x0b // 1
+#define PCI_CACHE_LINE_SIZE 0x0c // 1
+#define PCI_LATENCY_TIMER 0x0d // 1
+#define PCI_HEADER_TYPE 0x0e // 1
+#define PCI_BIST 0x0f // 1
+#define PCI_BAR0 0x10 // 4
+#define PCI_BAR1 0x14 // 4
+#define PCI_BAR2 0x18 // 4
+#define PCI_BAR3 0x1C // 4
+#define PCI_BAR4 0x20 // 4
+#define PCI_BAR5 0x24 // 4
+
+#define PCI_INTERRUPT_LINE 0x3C // 1
+
+#define PCI_SECONDARY_BUS 0x19 // 1
+
+#define PCI_HEADER_TYPE_DEVICE 0
+#define PCI_HEADER_TYPE_BRIDGE 1
+#define PCI_HEADER_TYPE_CARDBUS 2
+
+#define PCI_TYPE_BRIDGE 0x0604
+#define PCI_TYPE_SATA 0x0106
+
+#define PCI_ADDRESS_PORT 0xCF8
+#define PCI_VALUE_PORT 0xCFC
+
+#define PCI_NONE 0xFFFF
+
+typedef void (*pci_func_t)(uint32_t device, uint16_t vendor_id, uint16_t device_id, void *extra);
+
+struct pci_device_descriptor {
+ uint32_t port_base;
+ uint32_t interrupt;
+
+ uint8_t bus;
+ uint8_t slot;
+ uint8_t function;
+
+ uint16_t vendor_id;
+ uint16_t device_id;
+
+ uint8_t class_id;
+ uint8_t subclass_id;
+ uint8_t interface_id;
+
+ uint8_t revision;
+};
+
+static inline int pci_extract_bus(uint32_t device)
+{
+ return (uint8_t) ((device >> 16));
+}
+
+static inline int pci_extract_slot(uint32_t device)
+{
+ return (uint8_t) ((device >> 8));
+}
+
+static inline int pci_extract_func(uint32_t device)
+{
+ return (uint8_t) (device);
+}
+
+static inline uint32_t pci_get_addr(uint32_t device, int field)
+{
+ return 0x80000000 | (pci_extract_bus(device) << 16) | (pci_extract_slot(device) << 11) |
+ (pci_extract_func(device) << 8) | ((field) & 0xFC);
+}
+
+static inline uint32_t pci_box_device(int bus, int slot, int func)
+{
+ return (uint32_t) ((bus << 16) | (slot << 8) | func);
+}
+
+uint32_t pci_read_field(uint32_t device, int field, int size);
+
+void pci_write_field(uint32_t device, int field, int size, uint32_t value);
+
+uint16_t pci_find_type(uint32_t dev);
+
+void pci_scan_hit(pci_func_t f, uint32_t dev, void *extra);
+
+void pci_scan_func(pci_func_t f, int type, int bus, int slot, int func, void *extra);
+
+void pci_scan_slot(pci_func_t f, int type, int bus, int slot, void *extra);
+
+void pci_scan_bus(pci_func_t f, int type, int bus, void *extra);
+
+void pci_scan(pci_func_t f, int type, void *extra);
+
+void pci_remap();
+
+int pci_get_interrupt(uint32_t device);
+
+#endif